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REV. A
ADM1027
53
Table XXIX. Register 0x74  Interrupt Mask Register 1 (Power-On Default <7:0> = 0x00)
Bit
Name
R/W
Description
0
2.5 V
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the 2.5 V channel.
1
V
CCP
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the V
CCP
 channel.
2
V
CC
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the V
CC
 channel.
3
5 V
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the 5 V channel.
4
R1T
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the Remote 1 temperature channel.
5
LT
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the local temperature channel.
6
R2T
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the Remote 2 temperature channel.
7
OOL
Read/Write
This bit needs to be set to 1 to allow masking in the Interrupt Mask Register 2. If this bit
is not set to 1, then setting a bit in Mask Register 2 will have no effect.
Table XXX. Register 0x75  Interrupt Mask Register 2 (Power-On Default <7:0> = 0x00)
Bit
Name
R/W
Description
0
12 V
Read/Write
A 1 masks SMBALERT for out-of-limit conditions on the 12 V channel.
1
OVT
Read-Only
A 1 masks SMBALERT for overtemperature THERM conditions.
2
FAN1
Read/Write
A 1 masks SMBALERT for a Fan 1 fault.
3
FAN2
Read/Write
A 1 masks SMBALERT for a Fan 2 fault.
4
FAN3
Read/Write
A 1 masks SMBALERT for a Fan 3 fault.
5
FAN4
Read/Write
A 1 masks SMBALERT for a Fan 4 fault.
6
D1
Read/Write
A 1 masks SMBALERT for a diode open or short on Remote 1 channel.
7
D2
Read/Write
A 1 masks SMBALERT for a diode open or short on Remote 2 channel.
Table XXXI. Register 0x76  Extended Resolution Register 1
Bit
Name
R/W
Description
<1:0>
2.5 V
Read-Only
2.5 V LSBs. Holds the 2 LSBs of the 10-bit 2.5 V measurement.
<3:2>
V
CCP
Read-Only
V
CCP
 LSBs. Holds the 2 LSBs of the 10-bit V
CCP
 measurement.
<5:4>
V
CC
Read-Only
V
CC
 LSBs. Holds the 2 LSBs of the 10-bit V
CC
 measurement.
<7:6>
5 V
Read-Only
5 V LSBs. Holds the 2 LSBs of the 10-bit 5 V measurement.
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table XXXII. Register 0x77  Extended Resolution Register 2
Bit
Name
R/W
Description
<1:0>
12 V
Read-Only
12 V LSBs. Holds the 2 LSBs of the 10-bit 12 V measurement.
<3:2>
TDM1
Read-Only
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature
measurement.
<5:4>
LTMP
Read-Only
Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement.
<7:6>
TDM2
Read-Only
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature
measurement.
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Rev. 3 | Page 53 of 56 | www.onsemi.com
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